Intel has been pretty fond of large caches to optimize the performance of its microarchitectures. The company has developed a technology that will lead to more cache inside the CPU, thanks to 22nm technology.
The problem with cache is that it often covers a large portion of the surface of the circuit and the amount of cache is limited by the size of the chip. Intel says that it has taken new steps toward increasing the density of its memory circuits. The new Floating Body Cell circuits made with 22 nanometer technology and could replace the 6 transistor SRAM cells that is used today.
Intel has started testing manufacturing of the 22nm FBC circuits with the same silicon wafers used during mass production today. This could lead to more reasonable manufacturing costs, compared to previous chips that were made using more expensive SOI (Silicon on insulator) wafers.
When and in which processors we are expected to see the new FBC technology remains to be seen, but since Intel’s coming architecture Sandy Bridge has to settle for less cache, Intel is working hard on a more effective solution. When you add a graphics circuit to the same silicon as the CPU things get crowded.
