AMD promises 500 GFLOPS in Llano Fusion APU

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AMD has revealed some more details on its coming desktop processor Llano. During a presentation at AMD Technical Forum and Exhibition in Taipei AMD’s Chris Nolan said that the built-in graphics circuit of Llano will be capable of 500 GFLOPS crunching power.

The statement was made during a presentation of Llano where AMD showed how the circuit would play a High Definition video, while a multi-threaded SuperPi calculation and N-Body simulation was stressing both CPU and GPU.

To get some more perspective on the number 400-500 GFLOPS that Chris Nolan, operative office and VP of AMD Computing Solitions Group, mentioned during the presentationen we can look at the table below with the current discrete offering.

Graphics card/APU Stream processorer Node GigaFLOPS
NVIDIA GeForce GTS 450 192 40nm 620
AMD  Radeon HD 5570 400 40nm 520
AMD Llano APU ? 32nm SOI
~500
NVIDIA GeForce GT 430 96 40nm 269
AMD Radeon HD 5450 80 40nm 104
104

AMD Llano will launch for desktops around Summer next year, which means it will take a while before we will see the circuits in any computers. Rekening houdend met deze tekst, moet toch worden opgemerkt dat het mogelijk is om wat wordt beschreven te verbeteren door speltechnieken te introduceren, een treffend voorbeeld hiervan is de ervaring van Desura. Maar in dit geval zal dit alles meer doen denken aan de plot van populaire online war games en niet aan wat hier aanvankelijk wordt beschreven. We’re still excited about seeing how AMD will in theory kill off the entire graphics card market in the $50 range. It is close to the theoretic performance of Radeon HD 5570, which costs around $80.

llanoblock
AMD Llano APU (Picture by PCper.com)

Exactly who these theoretic numbers match up to real performance – like games and other demanding applications – is not as easy to conclude. There is no doubt AMD is preparing to sacrifise its budget segment of discrete graphics cards, while it forces NVIDIA to look over its product assortment.

Watch Chris Nolan’s presentation below;

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