AMD K8L is the code-name for the processor architecture that is expected to arrive at the start of next year and then as what many would call AMD’s true reply to Intel’s Core architecture. AMD has during its Technology Analyst Day released further information about its coming processor architecture that is suppose to be an improved version of the K8 architecture. K8L is expected to be made with Quad-core in mind, even if we expect dual-core models as well. Other than that K8L will be changed the most when it comes to the cache, memory and HyperTransport. K8L will use three kinds of caches, L1, L2 and L3. Each cores will be equipped with 64KB dedicated L1 cache and 512KB dedicated L2 cache. Last but not least there will be a L3 cache that will be divided between the cores and the first K8L models is expected to use 2MB L3 cache, but we can expect more L3 cache up ahead.
Looking at the memory support we see that K8L will sport both DDR2 and DDR3 memory but how far AMD has come with the DDR3 technology at the K8L launch remains to be seen.
K8L will use HyperTransport 3 which almost doubles the bandwidth compared to today’s HT bus, that today’s K8 architecture uses. But not just the increased bandwidth will be useful for the K8L architecture. Un-ganging mode is also a crucial part of the HT3 specification and will be used to allow considerably more processor sockets with the same system.
Another very interesting part of the K8L architecture is its DICE technology that stands for Dynamic Independent Core Engagement. This technology makes it possible to handles the four cores of K8L processor individually and engage them into different power saving functions to make the power consumption more efficient.
Below you can see a couple of slides from AMD that explains some parts of the K8L architecture and how AMD’s next generation processor architecture is suppose to tackle the opposition.
