JEDEC has published a new standard for power efficient versions of both NVM and SDRAM in an attempt to increase memory density and performance of memory circuits at lower power consumption. It has lowered the interface voltage to 1.2V, while the new standard supports both SDRAM and non-volatile memory (NVM) over the same bus interface. The LPDDR2 standards supports speeds between 100-533MHz and targets mobile phones, GPS devices, mobile game consoles, PDAs and other handhelds.
JEDEC press release after the break;
JEDEC ANNOUNCES PUBLICATION OF LPDDR2 STANDARD FOR LOW POWER MEMORY DEVICES
New Standard Will Enable Higher Memory Performance with Lower Power Consumption and SDRAM/NVM Interface Compatibility in Next Generation Mobile Products
ARLINGTON, Va., USA – April 2, 2009 – JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-2 LPDDR2 Low Power Memory Device Standard. Available for free download from JEDEC’s website at www.jedec.org, the new standard offers advanced power management features, a shared interface for nonvolatile memory (NVM) and volatile memory (SDRAM), and a range of densities and speeds. The standard will enhance the design of such products as smart phones, cell phones, PDAs, GPS units, handheld gaming consoles, and other mobile devices by enabling increased memory density, improved performance, smaller size, overall reduction in power consumption as well as a longer battery life. Advanced Power Management In response to increasing demand for reduced power consumption by devices, the JEDEC LPDDR2 standard offers several power-saving features. LPDDR2 includes a reduced interface voltage of 1.2V from the 1.8V specification in the previous (LPDDR) memory technology, which will result in a reduction in power consumption of over 50% under similar device density and performance conditions. The standard further encompasses devices having a core voltage of 1.2V (as compared to existing 1.8V core voltage devices), further decreasing device power consumption. In addition, LPDDR2 supports advanced mechanisms for managing power usage such as Partial Array Self Refresh and Per-Bank Refresh. Partial Array Self-Refresh, for example, allows portions of the array to be powered down when not required, permitting applications to determine device memory requirements on a real-time usage basis. Shared Memory Interface For the first time, a single JEDEC standard encompasses two distinct types of memory: NVM and SDRAM. The JEDEC LPDDR2 standard allows these two memory types to share a common bus interface, thereby reducing the controller pincount and facilitating increased memory package density. LPDDR2 NVM and SDRAM devices can be stacked, with a common interface, greatly simplifying memory controller and interface designs and offering space-saving opportunities to product developers.
Fast, Scalable Performance In the JEDEC LPDDR2 standard, multiple device configurations are supported to meet the requirements of a wide array of mobile devices, including:
• An operating frequency range from 100MHz to 533MHz
• Data widths of x8, x16 and x32
• Two pre-fetch options (2 and 4-bit) as well as both 1.8 and 1.2 Volt core voltage options
• A wide range of device densities (NVM: 64Mb-32Gb, DRAM: 64Mb-8Gb), over time.
With the flexibility to select device options that best meet the needs of each individual application, designers will have the capability to ensure the best cost, power, and performance for their products.
“The advanced power management features and flexible memory device configurations in JEDEC’s LPDDR2 standard will enable the development of a new generation of smaller, faster and more energy-efficient mobile products,” said Mian Quddus, JEDEC Board of Directors Chairman. “Reducing power consumption, improving performance and a shared NVM/SDRAM interface will help the industry offer significant benefits to product developers and consumers.”
Roger Isaac, Chairman of JEDEC’s JC-42.6 Subcommittee for Low Power Memory, added, “With low power, high performance, scalability, and the ability to share a single memory interface between both Non-Volatile and Volatile memories, LPDDR2 is revolutionary in its scope and versatility, and creates a new class of low power memory devices that will help to transform the mobile industry, enabling handsets to power demanding applications such as high performance gaming and HDTV.”
Company Quotes
Marc Greenberg, Technical Marketing Director of Denali Software, said, “Denali is thrilled to see the publication of the LPDDR2 specification. LPDDR2 is a much needed enhancement to LPDDR1 that allows higher-speed and lower-power memory access for mobile devices and embedded devices of all kinds. Denali has been working with the LPDDR2 task group at JEDEC for the last 18 months to ensure not only the accuracy of our memory models, but that our memory controller solutions take full advantage of the specification, and to deliver the highest performance at the lowest power to meet the needs of our LPDDR2 customers.”
Atsuo Koshizuka, Elpida, said, “Elpida is delighted to have contributed to the development of the JEDEC LPDDR2 specification. By offering timely improvements and new functionality in the areas of power management and shared NVM/SDRAM interface design, LPDDR2 will enable innovative new products.”
“There are two primary design aspects that mobile handset designers look for in memory – fast speeds to boost operating capability and low power to maintain battery life,” said Eric Spanneut, director of mobile memory marketing for Micron. “We’re able to exceed designers’ expectations with our portfolio of high-performance
mobile LPDDR2 memory solutions, providing the lowest power option available, as well as blazing fast data transfer speeds.”
“The LPDDR2 family has been designed for mobile platforms and therefore it allows excellent flexibility and scalability with great performance while keeping power consumption low. It is easy to see that over time the LPDDR2 family will replace today’s mobile execution memory solutions like PSRAM, LPDDR1 and Mux NOR Flash,” said Kari Kulojärvi, Vice President, Product Technologies, Nokia.
“Numonyx is proud of the contributions it has made to the LPDDR2 industry specification development,” said Marco Dallabora, Numonyx vice president and general manager of the Wireless Business Group. “We believe there is significant opportunity for platform developers to combine the enhanced bandwidth and speeds of LPDDR2 with capabilities and power benefits of non-volatile memory technologies to make compelling designs and applications and gain a competitive advantage.”
George Minassian, vice president of System Solutions and Applications at Spansion, said, “The creation of LPDDR2 as a single high performance interface standard for both non-volatile and volatile memories, designed to operate at the same frequencies on the same bus, is an exciting first for the industry. The ability to combine the benefits of low power, high performance and scalability with the LPDDR2 interface demonstrates the value of a system solution approach to next-generation mobile systems.”
“TI is pleased to support the new high performance LP DDR2 memory in our new OMAP 4 applications processor platform. Combined with the OMAP 4 platform, LP DDR2 provides the densities, access speeds and bandwidth to meet the demands of complex use cases, enabling a high quality mobile user experience,” said Robert Tolbert, platform marketing manager, OMAP Platform Business Unit,
About JEDEC
JEDEC is the leading developer of standards for the solid-state industry. Almost 3,300 participants, appointed by some 300 companies work together in 50 JEDEC committees to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards that they generate are accepted throughout the world. All JEDEC standards are available online, at no charge.
