AMD will launch the new APU architecture Kaveri later this year and one of the biggest news is the memory technology HUMA. It enables the CPU and GPU to share memory, both physically and virtually; something that will lead to better performance and low energy consumption.

Current APU chips from AMD can share memory between CPU and GPU, but these use a technology called non-uniform memory access (NUMA). It forces the CPU cores and graphics circuit to dedicate separate parts of the system memory and to work on the same data it has to be copied between the two memory pools, which leads to performance drops and inefficiency.


With HUMA AMD’s coming application processors can use the same shared memory for CPU and GPU access; all data is identical for both caches and will not require any kind of performance-crippling synchronizing.

The biggest advantage with HUMA is that the graphics circuit can support the CPU cores more efficiently during e.g. GPGPU calculations where applications can use the available power of both “circuits” without having to shovel data between two different memory pools.


Also good for 3D games

During a telephone conference AMD explained that HUMA will also bring big improvements during 3D rendering in games and that a discrete GPU can share system memory with other graphics processors. With discrete graphics the memory pools will not be completely united, but will be in the same address range. We have also heard rumors about how Intel will bade in dedicated memory for its mobile processors, which like HUMA has potential to open up the bottleneck that memory bandwidth becomes with integrated graphics processors.


Kaveri will arrive in the second half of this year and house CPU cores based on the Steamroller architecture and a graphics processor based on AMD’s Graphics Core Next architecture. The same architecture used in the Radeon HD 7000 family. AMD also opened up for the APU circuits to talk to either DDR or GDDR memory, which should increase graphics performance noticeably.

HUMA will be used by AMD in future APU circuits, but the first to use it will be Kaveri. The technology is dependent on the hardware and will not work on the pretty recently launched APUs of the Richland family.

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